
2002 Microchip Technology Inc.
Preliminary
DS30485A-page 141
PIC18FXX39
FIGURE 16-9:
I2C SLAVE MODE TIMING (TRANSMISSION, 7-BIT ADDRESS)
SD
A
SC
L
S
P
IF
(P
IR
1<
3>
)
B
F
(
SSP
ST
A
T
<
0>)
A6
A5
A4
A3
A2
A1
D6
D5
D4
D3
D2
D1
D0
1
2
3
4
5
6
7
8
2
3
4
5
6
7
8
9
SSP
BUF
is
wr
itt
en
in
s
of
twa
re
C
leared
in
sof
tw
are
S
C
Lhel
dl
ow
wh
ile
CPU
responds
to
S
P
IF
F
ro
m
SSPI
F
IS
R
Data
in
sam
pled
S
ACK
Tr
an
sm
itt
ing
D
at
a
R/
W
=
1
ACK
R
ecei
vi
ng
A
ddres
s
A7
D7
9
1
D6
D5
D4
D3
D2
D1
D0
2
3
4
5
6
7
8
9
S
P
B
U
F
is
w
rit
te
nin
s
oft
w
ar
e
C
leared
in
sof
tw
are
Fr
om
SS
PI
F
IS
R
T
ransmi
tti
ng
D
ata
D7
1
CK
P
ACK
C
K
P
is
s
et
in
so
ftw
ar
e
C
K
P
is
s
et
in
so
ftw
ar
e